DFM Analysis

Test Point Analysis will primarily include:

 

  • Toeprint Testpoints 

Testpoints are grouped into toeprint testpoints (which have component pins) and via testpoints (which have no components and are used for signal transfer or testing).

  • Via Testpoints

Testpoints are grouped into toeprint testpoints (which have components pins) and via testpoints (which have no components and are used for signal transfer or testing).

  • Nets Without Testpoints 

Purpose: To identify nets which have no testpoint access locations.

  • Nets With Multiple Testpoints 

Reports nets with more than one testpoint. For each CAD net with more than one testpoint, reports the number of testpoints on the net and the net name.

  • Testpoint Wrong Shape 

Reports testpoints in accordance with tp_shape.

  • Other Testpoints 

Reports testpoints which are not component toeprints or via pads.

  • Nets With One Testpoint

Reports nets with one testpoint. For each CAD net with one testpoint, reports one signal layer pad (belonging to the net) and the net name.

  • Testpoint to Testpoint 

Testpoints should be kept sufficiently apart in order to allow simultaneous probing without collision.


  • Testpoint to Toeprint 

Testpoints should be kept sufficiently apart to allow simultaneous probing without collision.


  • Testpoint to Capped Via 

Testpoints clearance is required to avoid solder bridging and the potential shorting across two pads with a test probe.

  • Testpoint to Uncapped Via 

Testpoints clearance is required to avoid solder bridging and the potential shorting across two pads with a test probe.

  • Testpoint to Exposed Copper 

Purpose: To assure testpoint probes do not touch and have sufficient clearance from exposed copper. Reports only copper pads which are neither via nor toeprint pads.

  • Testpoint to Unexposed Copper

Certain types of probes can penetrate the solder mask cover and cause false shorts.

  • Testpoint Density Under Component 

Too many testpoint probes concentrated in a small area on the opposite side of the board from a component can cause pressure that could damage the component and crack solder joints.

  • Testpoint to NPTH 

Testpoints should be kept distant from large, non-plated through holes which may adversely affect the vacuum pressure of the probing arm.

  • Testpoint to THMT Toeprint 

Testpoints clearance is required to prevent potential shorting across two pads with a test probe.

  • Testpoint to Tooling Hole 

Purpose: To detect tooling holes close enough to a testpoint to cause it damage.

  • Via Diameter in Testpoint 

Purpose: To detect via pads whose drills are too large to be used as testpoint.

  • Via AR in Testpoint

Purpose: To detect via annular rings which are not large enough to allow proper contact of the probe and the testpoint pad.

  • Testpoint to Rout 

Testpoints should be kept distant from the edge of the board so as not to affect the vacuum pressure of the probing arm.

  • Testpoint to Conveyed Edge 

Reports distances between testpoints and conveyed edges (edges parallel to the SMT process) in the rout layer. The test checks the bounding box of the board (the smallest rectangle to contain it). The conveyed edge, in some cases, may be further than the closest rout edge. Proper definition of rout or profile is critical for the accuracy of the check. Does not report copper features with attribute Copper Feature Ignore.

  • Testpoint to Non-Conveyed Edge 

Reports distances between testpoints and non-conveyed edges (edges perpendicular to the SMT process) in the rout layer.The test checks the bounding box of the board (the smallest rectangle to contain it). The non-conveyed edge, in some cases, may be further than the closest rout edge. Proper definition of rout or profile is critical for the accuracy of the check. Does not report copper features with attribute Copper Feature Ignore.

  • Testpoint Under Component 

Testpoints should not be placed under components where they cannot be accessed.

  • Testpoint to Component 

A testpoint probe must have access clearance from component bodies.

  • Testpoint to Component Angle 

A testpoint probe must have access clearance based upon component height.

  • Testpoint to SM 

Testpoints must have sufficiently large solder mask openings to provide sufficient metal contact with a test probe.

  • Capped Testpoint Vias 

The area between testpoint copper and a probe must be unobstructed.

  • Via Capped on Both Sides 

Vias capped on both sides do not vent correctly during solder processes.

  • Uncapped Non-Testpoint Vias

Uncapped vias increase the possibility of shorts.

  • Testpoints Outside Keepin Area

Reports testpoints outside the testpoint ‘Keepin’ areas of the board. These areas are placed on the document layers whose names are defined in the Testpoint Keepin Layer job attribute. The areas have attributes Test Point Keep In and Assigned Area to Component Side (with the appropriate value for the layer being checked).

  • Testpoints Within Keepout Area 

Reports testpoints inside the testpoint ‘Keepout’ areas of the board.These areas are placed on the document layers defined in the Testpoint Keepout Layer job attribute. The areas have attributes Test Point Keep Out andAssigned Area to Component Side (with the appropriate value for the layer being checked).

  • Testpoint to Silk Screen

Silk screen features must be far enough from a testpoint to allow metal contact with a test probe.


  • Nets Missing Testpoints 

Reports nets with a less than expected number of testpoints, as specified in the net attribute Expected Test Point Count.

  • Nets With Necessary Testpoints 

Reports nets with the exact number of testpoints, as specified in the net attribute Expected Test Point Count.

  • Nets With Extra Testpoints

Reports nets with more than the number of testpoints specified in the net attribute Expected Test Point Count.

  • Testpoint Missing Solderpaste 

Some production processes, such as OSP, require that testpoints have solderpaste applied to make sure that the test probes have good contact.